Title :
ASIC Implimentation of 1 Bit Full Adder
Author :
Patel, Deepchand ; Parate, Prvinkumar G. ; Patil, Prafulla S. ; Subbaraman, S.
Author_Institution :
ME, WCE, Sangli
Abstract :
Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. In addition to its main task, which is adding two numbers, it participates in many other useful operations such as subtraction, multiplication, division, address calculation, ..Etc. In this paper we have presented study of different logic structure using 1-bit full adder circuit. we have compared this logic structure on certain parameter such as power and delay from schematic and layout.
Keywords :
CMOS logic circuits; adders; application specific integrated circuits; integrated circuit design; logic design; 1 bit full adder; ASIC implementation; CMOS logic structures; DSP architectures; digital signal processors; integrated circuit design; microprocessors; Adders; Application specific integrated circuits; CMOS logic circuits; CMOS technology; Capacitance; Delay; Logic circuits; Power dissipation; Very large scale integration; Wiring; Adder; CMOS; VLSI; circuit simulation; combinational logic circuit; delay estimation; power consumption;
Conference_Titel :
Emerging Trends in Engineering and Technology, 2008. ICETET '08. First International Conference on
Conference_Location :
Nagpur, Maharashtra
Print_ISBN :
978-0-7695-3267-7
Electronic_ISBN :
978-0-7695-3267-7
DOI :
10.1109/ICETET.2008.24
