Characterizing subthreshold behavior in poly-Si TFTs based on interface trap states

Author

Hayashi, F. ; Ikeuchi, H. ; Kitakata, M. ; Sasaki, T.

Author_Institution

ULSI Device Dev. Lab., NEC Corp., Sagamihara, Japan

fYear

1993

fDate

5-8 Dec. 1993

Firstpage

501

Lastpage

504

Abstract

The subthreshold behavior in poly-Si TFTs (Thin Film Transistors) has been analyzed in detail. It has been demonstrated that the high subthreshold slope factor and the back bias dependence of the subthreshold characteristics can be reproduced by the model based on Si-SiO/sub 2/ interface trap states. The importance of reducing the interface trap density in poly-Si TFTs is shown.<>

Keywords

electron traps; electronic density of states; elemental semiconductors; interface electron states; semiconductor device models; semiconductor-insulator boundaries; silicon; silicon compounds; thin film transistors; Si-SiO/sub 2/; Si-SiO/sub 2/ interface; back bias dependence; interface trap density; interface trap states; poly-Si TFTs; subthreshold behavior; subthreshold characteristics; subthreshold slope factor; Capacitance measurement; Density measurement; Grain boundaries; Grain size; MOSFETs; Semiconductor films; Silicon; Thin film transistors; Ultra large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-1450-6

Type

conf

DOI

10.1109/IEDM.1993.347301

Filename

347301