DocumentCode :
2313689
Title :
TFSOI BiCMOS technology for low power applications
Author :
Huang, W.M. ; Klein, K. ; Grimaldi, M. ; Racanelli, M. ; Ramaswami, S. ; Tsao, T. ; Foerstner, J. ; Hwang, B.Y.
Author_Institution :
Adv. Technol. Center, Motorola Inc., Mesa, AZ, USA
fYear :
1993
fDate :
5-8 Dec. 1993
Firstpage :
449
Lastpage :
452
Abstract :
A thin film silicon on insulator BiCMOS technology has been developed for low power applications. The technology is based on a manufacturable, near-fully-depleted 0.5 /spl mu/m CMOS process with the lateral bipolar device integrated as a drop-in module for BiCMOS circuits. The bipolar device structure emphasizes use of a silicided polysilicon base contact to reduce base resistance and minimize current crowding effects. A split-oxide spacer integration is used to define the bipolar base and emitter widths independently. Low current ECL gate speeds up to 2/spl times/ faster than bulk double-polysilicon self-aligned bipolar circuits have been demonstrated.<>
Keywords :
BiCMOS integrated circuits; SIMOX; integrated circuit technology; semiconductor-insulator boundaries; silicon; 0.5 micron; BiCMOS technology; ECL gate speeds; TPSOI; base resistance; current crowding; drop-in module; lateral bipolar device; low power applications; near-fully-depleted 0.5 /spl mu/m CMOS process; silicided polysilicon base contact; split-oxide spacer integration; thin film silicon on insulator; BiCMOS integrated circuits; CMOS process; CMOS technology; Integrated circuit manufacture; Integrated circuit technology; Manufacturing processes; Semiconductor thin films; Silicon on insulator technology; Space technology; Thin film circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International
Conference_Location :
Washington, DC, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-1450-6
Type :
conf
DOI :
10.1109/IEDM.1993.347313
Filename :
347313
Link To Document :
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