• DocumentCode
    2314166
  • Title

    Testing and prevention of head-in-pillow

  • Author

    Liu, Yan ; Fiacco, Pamela ; Lee, Ning-Cheng

  • Author_Institution
    Indium Corp., Clinton, NY, USA
  • fYear
    2010
  • fDate
    20-22 Oct. 2010
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The electronic industry is moving toward smaller, faster, and cheaper. In the case of CSP or BGA, the components are reducing in pitch and ball size but increasing in package size. Due to the high complexity in design, many components inevitably suffer from warpage at soldering temperature, and consequently result in head-in-pillow (HIP) defect. The symptom of this defect is that the solder ball on BGA is sitting on solder dome formed from coalescence of solder paste. Although mechanical contact is established, solder joint is neither formed metallurgically nor exhibiting an adequate joint shape. Furthermore, electrical continuity may or may not be established. This defect type is a liability of devices, and is recognized to be related to type of components, processes, and solder pastes. However, as of today, an effective testing method has not been reported for predicting the propensity of HIP phenomenon under a given combination of process and materials. This becomes a desperate need when a robust solder paste is desired at solder paste selection phase. In this work, test methods have been developed for assessing the potential of having HIP issue for a specific solder paste. In the mean time, mechanisms of formation of HIP are also discussed. Accordingly, new solder pastes with excessive resistance against HIP were developed and assessed with these test methods, with results to be discussed in details.
  • Keywords
    ball grid arrays; chip scale packaging; solders; testing; BGA; CSP; HIP defect; design complexity; electrical continuity; electronic industry; head-in-pillow prevention; head-in-pillow testing; mechanical contact; solder joint; solder paste coalescence; solder paste selection phase; soldering temperature; warpage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microsystems Packaging Assembly and Circuits Technology Conference (IMPACT), 2010 5th International
  • Conference_Location
    Taipei
  • ISSN
    2150-5934
  • Print_ISBN
    978-1-4244-9783-6
  • Electronic_ISBN
    2150-5934
  • Type

    conf

  • DOI
    10.1109/IMPACT.2010.5699670
  • Filename
    5699670