• DocumentCode
    2314377
  • Title

    The importance of full target environment simulation tests for architecture validation

  • Author

    Mason, Jack L.

  • Author_Institution
    Grad. Sch. of Comput. & Inf. Sci., Nova Southeastern Univ., Fort Lauderdale, FL, USA
  • fYear
    2009
  • fDate
    7-9 Dec. 2009
  • Firstpage
    15
  • Lastpage
    18
  • Abstract
    Proposed architectural advancements focus on solutions for known deficiencies. Validation of the proposals sometimes is limited to simple scenarios where the deficiency exists. Due to simulation overhead, the validation testing may be limited to small test scripts, and may not include the entire target environment in which the proposed architectures would be eventually applied. A case study is presented regarding several proposals for Speculative Execution. In each proposal, simulation testing is limited to small test scripts executing as stand-alone binaries. No provision is made to execute these binaries within the context and control of a host operating system, including interaction with external hardware and software components. By avoiding the simulation of a complete target environment, key issues are not addressed that could repudiate the validity of these proposals. This paper hopes to impress upon the reader the importance of architecture validation through rigorous testing by simulation of the anticipated target environments. The lessons learned in this case study presented in this paper can be generalized and applied to other micro-architecture proposals.
  • Keywords
    computer architecture; performance evaluation; architectural advancement; architecture validation; full target environment simulation test; host operating system; microarchitecture proposal; simulation overhead; speculative execution proposal; validation testing; Computational modeling; Computer architecture; Control systems; Discrete event simulation; Microprocessors; Operating systems; Processor scheduling; Proposals; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microprocessor Test and Verification (MTV), 2009 10th International Workshop on
  • Conference_Location
    Austin, TX
  • ISSN
    1550-4093
  • Print_ISBN
    978-1-4244-6479-1
  • Electronic_ISBN
    1550-4093
  • Type

    conf

  • DOI
    10.1109/MTV.2009.23
  • Filename
    5460789