Constraint Management and Checking in Template-Based Circuit Designs

In a template-based design methodology, constraint management and proof are critical to accurate circuit analysis. Constraints are defined in one of three places: at the template level, at the circuit design level, or at the RTL level. Constraints are used to restrict the patterns of both logical and electrical analyses. At the circuit level, where the templates are instantiated, the constraints must be proven true to validate the logical and electrical analyses. In this paper, we show all aspects of our constraint management in our template-based design methodology. We show how we use constraints for formal equivalence checking, electrical analysis, and template verification and how we validate constraints using formal techniques and simulation assertions.