On the Mutation Analysis of SystemC TLM-2.0 Standard

Transaction-level modeling (TLM) is the most promising technique to deal with the increasing complexity of modern embedded systems. TLM provides designers with high-level interfaces and communication protocols for abstract modeling and efficient simulation of system platforms involving both hardware and software components. The Open SystemC Initiative (OSCI) has recently released the TLM-2.0 standard, to standardize the interface between component models for bus-based systems. The standard TLM aims at facilitating the interchange of models between suppliers and users, and thus encouraging the use of virtual platforms for fast simulation prior to the availability of register-transfer level (RTL) code. This paper discusses on the mutation analysis concept applied to the TLM context and proposes a mutation model for perturbing TLM SystemC descriptions. In particular, the main constructs provided by the latest OSCI TLM-2.0 standard are analyzed, and a set of mutants is proposed to perturb the primitives related to the TLM communication interfaces.