Title :
Threshold voltage controlled 0.1-/spl mu/m MOSFET utilizing inversion layer as extreme shallow source/drain
Author :
Noda, H. ; Murai, F. ; Kimura, S.
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
Abstract :
MOSFETs containing sub-gates as sidewall spacers of the main gate are fabricated. The inversion layers induced in these MOSFETs by the sub-gates are used as source and drain, in order to investigate how the extremely shallow junction affects the short channel characteristics of MOSFETs. Significant improvement in the short channel characteristics is observed in comparison with conventional MOSFETs whose junctions are formed by ion implantation. These new MOSFETs do not show threshold voltage roll-off at the defined gate length around 0.1 /spl mu/m, and punchthrough is not observed down to 0.07 /spl mu/m.<>
Keywords :
carrier density; insulated gate field effect transistors; inversion layers; 0.07 to 0.1 micron; extreme shallow source/drain; extremely shallow junction; inversion layer; short channel characteristics; sidewall spacers; sub-gates; threshold voltage controlled MOSFET; Conductivity; Fabrication; Identity-based encryption; Insulation; MOSFET circuits; Resists; Substrates; Threshold voltage; Transconductance; Voltage control;
Conference_Titel :
Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-1450-6
DOI :
10.1109/IEDM.1993.347384
