DocumentCode
2316253
Title
Experiences and challenges in system design
Author
Rabaey, Jan M.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1998
fDate
16-17 Apr 1998
Firstpage
2
Lastpage
4
Abstract
This paper examines the desirability and viability of state-of-the-art system design at the university. To put the problem in perspective, a number of actual designs exercises, executed at UC Berkeley over the last decade, will be examined. A number of potential models for success are proposed and analyzed. While this paper might provide some insight, it is surely hoped that it might serve as the basis for an ongoing discussion that might lead to an (inter)national infrastructure for system-design in the long term
Keywords
electronic engineering education; integrated circuit design; systems engineering; UC Berkeley; designs exercises; state-of-the-art system design; system-design; university; Application specific integrated circuits; Chip scale packaging; Collaboration; Educational institutions; Electrical capacitance tomography; Field programmable gate arrays; Hidden Markov models; Random access memory; Sensor systems; Software design;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI '98. System Level Design. Proceedings. IEEE Computer Society Workshop on
Conference_Location
Orlando, FL
Print_ISBN
0-8186-8448-8
Type
conf
DOI
10.1109/IWV.1998.667105
Filename
667105
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