DocumentCode :
2316559
Title :
FPGA based singular value decomposition for image processing applications
Author :
Rahmati, Masih ; Sadri, Mohammad Sadegh ; Naeini, Mehdi Ataei
Author_Institution :
Isfahan Univ. of Technol., Isfahan
fYear :
2008
fDate :
2-4 July 2008
Firstpage :
185
Lastpage :
190
Abstract :
During last decades, singular value decomposition has been widely used in different fields of engineering and science. This makes SVD calculation algorithms and its feasible implementations, an attractive area of research. FPGA implementation of SVD is addressed in some past publications, however, appearance of new primary elements such as dedicated hardware multipliers, block memories and CPU cores inside new FPGA products, such as Xilinx Virtex-4, made it possible to use them in more complicated computation tasks.
Keywords :
field programmable gate arrays; image processing; singular value decomposition; FPGA; SVD; Xilinx Virtex-4; image processing applications; singular value decomposition; Digital signal processing; Field programmable gate arrays; Hardware; Image processing; Jacobian matrices; Logic; Mathematics; Matrix decomposition; Signal processing algorithms; Singular value decomposition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Systems, Architectures and Processors, 2008. ASAP 2008. International Conference on
Conference_Location :
Leuven
ISSN :
2160-0511
Print_ISBN :
978-1-4244-1897-8
Electronic_ISBN :
2160-0511
Type :
conf
DOI :
10.1109/ASAP.2008.4580176
Filename :
4580176
Link To Document :
بازگشت