Title :
A compilable binary tree parallel multiplier designed for speed and testability
Author :
Venzl, G. ; Mitchell, R.
Author_Institution :
Siemens AG, Corporate Laboratories for Information Technology
Conference_Titel :
VLSI Circuits, 1988. Digest of Technical Papers., 1988 Symposium on
Conference_Location :
Tokyo, Japan
DOI :
10.1109/VLSIC.1988.1037439
