DocumentCode :
2316900
Title :
Throughput-scalable hybrid-pipeline architecture for multilevel lifting 2-D DWT of JPEG 2000 coder
Author :
Mohanty, Basant K. ; Meher, Pramod K.
Author_Institution :
Dept. of Electron.&Commun., Jaypee Inst. of Eng. & Technol., Guna
fYear :
2008
fDate :
2-4 July 2008
Firstpage :
305
Lastpage :
309
Abstract :
In this paper, we propose a pipelined-architecture for high-throughput computation of multilevel lifting 2D discrete wavelet transform (DWT). The multilevel DWT computation is shared by the proposed devices based on pyramid algorithm (PA) and recursive pyramid algorithm (RPA), where the PA-based devices compute the lower order subands and the higher order subbands are computed by an RPA-based device. The hardware- and time-complexities of the proposed structure are compared with those of the existing recursive architectures for performance evaluation. Compared with the best of the existing recursive architectures, the proposed one has nearly 16 times less average computation time (ACT) for the 2D DWT of input size 512 x 512 for S=32, where S is half of the input rate of the structure. Moreover, it involves less number of multipliers and adders than the others when normalized for unit throughput rate. The proposed design offers nearly 100% utilization efficiency for S=32, and 94% efficiency for S=8. The latency of the structure is very small (which is of the order of a few cycles), and involves a small on-chip storage and less number of data/pipeline registers.
Keywords :
data compression; discrete wavelet transforms; image coding; pipeline processing; transform coding; JPEG 2000 coder; data registers; discrete wavelet transform; high throughput computation; hybrid pipeline architecture; multilevel lifting 2D DWT; pipeline registers; pyramid algorithm; recursive architectures; recursive pyramid algorithm; Computer architecture; Delay; Discrete cosine transforms; Discrete wavelet transforms; Filters; Image coding; Pipelines; Throughput; Two dimensional displays; Wavelet transforms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Systems, Architectures and Processors, 2008. ASAP 2008. International Conference on
Conference_Location :
Leuven
ISSN :
2160-0511
Print_ISBN :
978-1-4244-1897-8
Electronic_ISBN :
2160-0511
Type :
conf
DOI :
10.1109/ASAP.2008.4580196
Filename :
4580196
Link To Document :
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