High-reliability and high-speed design of 1Mb CMOS SRAM with 0.5/spl mu/m devices

Author

Hayakawa, S. ; Kakumu, M. ; Aono, A. ; Yoshida, T. ; Sato, K. ; Noguchu ; Ohtani, T. ; Nakayama, T. ; Asami, T. ; Morita, S. ; Kinugawa, M. ; Matsunaga, J. ; Ochit

Author_Institution

Toshiba Corp.

fYear

1989

fDate

25-27 May 1989

Firstpage

Lastpage

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1989. Digest of Technical Papers., 1989 Symposium on

Conference_Location

Kyoto, Japan

Type

DOI

10.1109/VLSIC.1989.1037474

Filename

1037474

Link To Document