DocumentCode
2317818
Title
A speed enhancement DRAM array architecture with embedded ECC
Author
Arimoto, K. ; Matsuda, Y. ; Furutani, K. ; Tsukude, M. ; Oisiii ; Mashiko, K. ; Fujishima, K.
Author_Institution
Mitsubishi Electric Corporation
fYear
1989
fDate
25-27 May 1989
Firstpage
111
Lastpage
112
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 1989. Digest of Technical Papers., 1989 Symposium on
Conference_Location
Kyoto, Japan
Type
conf
DOI
10.1109/VLSIC.1989.1037514
Filename
1037514
Link To Document