Two-level pipelined systolic array graphics engine

Author

Jayasinghe, J. K S ; Karagiannis, G. ; El-Hadidy, F. ; Herrmann, O. ; Smit, J.

Author_Institution

Twente Univ., Enschede, Netherlands

fYear

1990

fDate

13-16 May 1990

Abstract

A silicon implementation of a two-level pipelined SAG (systolic array graphics) engine supporting an advanced instructions set is reported. The advantage of the two-level pipelining is that it can provide a complex functionality at high pixel rates, which is difficult to achieve by other means using less silicon area. As computer graphics users have a great desire for high image quality, high interaction speed and high resolution, it is expected that two-level pipelined SAG engines will be a breakthrough for real-time computer graphics

Keywords

CMOS integrated circuits; computer graphic equipment; computerised picture processing; pipeline processing; systolic arrays; advanced instructions set; complex functionality; high image quality; high interaction speed; high pixel rates; high resolution; real-time computer graphics; systolic array graphics; systolic array graphics engine; two-level pipelined SAG engines; two-level pipelining; Computer graphics; Displays; Engines; Image generation; Image quality; Interpolation; Laboratories; Network theory (graphs); Systolic arrays; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990

Conference_Location

Boston, MA

Type

conf

DOI

10.1109/CICC.1990.124759

Filename

124759