Quick conservative causality analysis

The causality problem is that of determining if a combinational circuit with cycles has acceptable behavior: that for all inputs the outputs are well defined and stable. While the problem manifests itself at the circuit level, it usually originates at the system level. It may arise when a system is designed as a collection of modules: when composed, cycles are discovered in the ensemble. One must analyze these cycles to correct possible errors or to capture the correct behavior appropriately for further synthesis. Previously published algorithms use iterated ternary logic simulation. This is correct and robust, but expensive and in many cases overkill. We propose a more efficient but conservative algorithm based on applying standard logic synthesis techniques of increasing power. We present initial results to demonstrate the practicality of this approach