Title :
Low Area-time Complexity Averaging Scheme for Thumbnail Generation
Author :
Satzoda, Ravi Kumar ; Sathyanarayana, Suchitra ; Srikanthan, Thambipillai
Author_Institution :
Centre for High Performance Embedded Syst., Nanyang Technol. Univ.
Abstract :
Image preprocessing is an important step in most real-time neural-network based pattern recognition systems. Thumbnail generation is a commonly used preprocessing method to reduce the hardware complexity of the input layer of a neural network. A direct implementation of the averaging method to create thumbnails incurs high hardware cost. In this paper we propose an optimized averaging method that outperforms standard averaging method in terms of device utilization, maximum operating frequency and latency, when implemented using FPGA design methodology. It eliminates the use of accumulators and dividers and offers hardware savings of as much as 96% over standard averaging method. Also, the proposed averaging is performed in a single cycle making it more suitable for real-time implementations
Keywords :
computational complexity; field programmable gate arrays; image recognition; logic design; neural nets; FPGA design; image preprocessing; low area-time complexity averaging scheme; neural network; pattern recognition systems; thumbnail generation; Costs; Data preprocessing; Delay; Design optimization; Field programmable gate arrays; Frequency; Neural network hardware; Neural networks; Pattern recognition; Real time systems; FPGA; Thumbnail generation;
Conference_Titel :
Control, Automation, Robotics and Vision, 2006. ICARCV '06. 9th International Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0341-3
Electronic_ISBN :
1-4214-042-1
DOI :
10.1109/ICARCV.2006.345337