Fast and extensive system-level memory exploration for ATM applications

A memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and applied on part of an industrial ATM application to show how our novel approach can be used to easily and thoroughly explore the memory organization search space at the system level. An extended, novel method for signal to memory assignment is proposed which takes into account memory access conflict constraints. The number of conflicts are first optimized by our flow graph balancing technique. Significant power and area savings were obtained by performing the exploration thoroughly at each of the degrees of freedom in the global search space