Optimization method for broadband modem FIR filter design using common subexpression elimination

An approach for broadband modem FIR filter design optimization is presented. It addresses the minimization of the number of adder-subtractors used in the hardware implementation of a FIR filter (the multiple constant multiplication problem). The method is based on the identification and elimination of common n-bit pattern subexpressions in a set of filter coefficients by means of an exhaustive search. We give an algorithm description of our solution and demonstrate its performance on selected examples. A comparison of the results obtained by other authors is made, and finally, optimization and synthesis results on a realistic example-a 64-tap root-raised-cosine filter with 10-bit CSD (canonical signed digit) coefficients-are given