Title :
Port calling: a transformation for reducing I/O during multi-package functional partitioning
Author_Institution :
Dept. of Comput. Sci., California Univ., Riverside, CA, USA
Abstract :
Partitioning a system among multiple input and output (I/O) pin limited packages is a widely researched and hard-to-solve problem. I previously (Proc. Int. Symp. on FPGA, pp. 27-34, 1997) described a new approach yielding large improvements, which partitioned functions rather than structure, and which used a single bus for all inter-package data transfer. In this paper, I describe an extension permitting arbitrary distribution of I/O among the packages, and highlight experiments demonstrating even further I/O reductions, as well as surprisingly improved performance, with nearly no penalty
Keywords :
field programmable gate arrays; logic partitioning; multichip modules; FPGA; I/O reductions; arbitrary I/O distribution; improved performance; inter-package data transfer bus; multi-package functional partitioning; multiple I/O pin limited packages; port calling; Computer science; Embedded software; Embedded system; Emulation; Field programmable gate arrays; Hardware; Logic; Packaging; Pins; Software packages;
Conference_Titel :
System Synthesis, 1997. Proceedings., Tenth International Symposium on
Conference_Location :
Antwerp
Print_ISBN :
0-8186-7949-2
DOI :
10.1109/ISSS.1997.621682