• DocumentCode
    2320622
  • Title

    Implementing phase unwrapping using Field Programmable Gate Arrays or Graphics Processing Units: A comparison

  • Author

    Braganza, Sherman ; Leeser, Miriam

  • Author_Institution
    Northeastern Univ., Boston, MA
  • fYear
    2008
  • fDate
    16-16 Nov. 2008
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    Phase unwrapping is the process of converting discontinuous phase data into a continuous image. This procedure is required by any imaging technology that uses phase data such as MRI, SAR or OQM microscopy. Such algorithms often take a significant amount of time to process on a general purpose computer, rendering it difficult to process large quantities of information. This paper compares implementations of a specific phase unwrapping algorithm known as Minimum LP norm unwrapping on a field programmable gate array (FPGA) and on a graphics processing unit (GPU) for the purpose of acceleration. The computation required involves a matrix preconditioner (based on a DCT transform) and a conjugate gradient calculation along with a few other matrix operations. These functions are partitioned to run on the host or the accelerator depending on the capabilities of the accelerator. The tradeoffs between the two platforms are analyzed and compared to a general purpose processor (GPP) in terms of performance, power and cost.
  • Keywords
    computer graphic equipment; conjugate gradient methods; discrete cosine transforms; field programmable gate arrays; image processing; rendering (computer graphics); DCT transform; conjugate gradient calculation; discontinuous phase data; field programmable gate arrays; general purpose processor; graphics processing units; minimum LP norm unwrapping; phase unwrapping; rendering; Acceleration; Computer graphics; Discrete cosine transforms; Field programmable gate arrays; Image converters; Magnetic resonance imaging; Microscopy; Performance analysis; Phased arrays; Rendering (computer graphics);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High-Performance Reconfigurable Computing Technology and Applications, 2008. HPRCTA 2008. Second International Workshop on
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-2826-7
  • Type

    conf

  • DOI
    10.1109/HPRCTA.2008.4745687
  • Filename
    4745687