Bias relationships for Envelope Tracking technique

In this paper, the envelope tracking technique applied to a single device will be analysed. Starting from a simplified model of the active device, closed form equations to pilot the drain and gate bias voltages will be derived. The theoretical approach adopted is able to describe the evolution of the device performance as a function of the instantaneous input power value. In order to validate the approach a design example at 2.5 GHz will be also described.