DocumentCode
2322141
Title
MFMox ferroelectric memory transistor
Author
Hsu, S.T. ; Li, T.K.
Author_Institution
Sharp Labs. of America, Camas, WA, USA
fYear
2004
fDate
15-17 Nov. 2004
Firstpage
24
Lastpage
27
Abstract
Ferroelectric memory transistor is known for poor charge retention time. An alternative device structure has been developed to solve the retention problem of ferroelectric memory transistors. The gate structure of the new ferroelectric memory transistor is metal on ferroelectric thin film on bottom electrode on n-type semiconductive metal oxide on p-type silicon. The bottom electrode is in direct contact to the semiconductive metal oxide. Therefore, there is no floating gate in this device. The threshold voltage memory window of an experimental device extrapolation from 4 days of measured data to 10 years is about 1V.
Keywords
ferroelectric storage; transistors; MFMox ferroelectric memory transistor; bottom electrode; ferroelectric thin film; n-type semiconductive metal oxide; nonvolatile memory transistor; p-type silicon; threshold voltage memory window; Electrodes; Ferroelectric materials; Insulation; Leakage current; Nonvolatile memory; Polarization; Semiconductor thin films; Silicon; Thin film transistors; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Memory Technology Symposium, 2004
Print_ISBN
0-7803-8726-0
Type
conf
DOI
10.1109/NVMT.2004.1380794
Filename
1380794
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