Title :
Cellular realization of TSC checkers for error detecting codes
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
Abstract :
The author is concerned with the cellular or cascade realization of totally self-checking (TSC) checkers for some popular error detecting codes, such as the m-out-of-n code and Borden´s code. TSC checkers are used to build self-checking circuits in realizing reliable computer and communication systems. Cellular realization is very suitable for VLSI implementation due to the uniform interconnection pattern of identical cells. Because of low fan-in/fan-out and a uniform interconnection pattern it uses a small chip area. As identical cells are used, the design time is also very low
Keywords :
cellular arrays; error detection codes; Borden´s code; TSC checkers; VLSI implementation; cascade realization; cellular realisation; error detecting codes; m-out-of-n code; totally self-checking; uniform interconnection pattern; Built-in self-test; Cellular networks; Circuit faults; Circuit testing; Computer errors; Data communication; Data processing; Digital systems; Integrated circuit interconnections; Very large scale integration;
Conference_Titel :
Computer and Communication Systems, 1990. IEEE TENCON'90., 1990 IEEE Region 10 Conference on
Print_ISBN :
0-87942-556-3
DOI :
10.1109/TENCON.1990.152698
