• DocumentCode
    2323721
  • Title

    SAR ADC algorithm with redundancy

  • Author

    Ogawa, Tomohiko ; Kobayashi, Haruo ; Hotta, Masao ; Takahashi, Yosuke ; San, Hao ; Takai, Nobukazu

  • Author_Institution
    Dept. of Electron. Eng., Gunma Univ., Maebashi
  • fYear
    2008
  • fDate
    Nov. 30 2008-Dec. 3 2008
  • Firstpage
    268
  • Lastpage
    271
  • Abstract
    This paper describes a redundant algorithm for a highly reliable Successive Approximation Register (SAR) ADC where mistakes of comparator decision can be digitally-corrected. We generalize a conventional non-binary search algorithm which requires more conversion steps in the SAR ADC than the binary search algorithm, and clarify which decision errors can be digitally-corrected with the derived redundant algorithm. We also shows that the sampling speed of the SAR ADC using the proposed algorithm can be faster when the incomplete settling effects of the DAC inside the SAR ADC are taken into account.
  • Keywords
    analogue-digital conversion; digital-analogue conversion; ADC algorithm; DAC; comparator decision; redundant algorithm; successive approximation register; Approximation algorithms; Automotive electronics; Costs; Design methodology; Error correction; Microcontrollers; Redundancy; Reliability engineering; Sampling methods; Voltage; Digital Error Correction; Non-binary; Redundancy; SAR ADC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
  • Conference_Location
    Macao
  • Print_ISBN
    978-1-4244-2341-5
  • Electronic_ISBN
    978-1-4244-2342-2
  • Type

    conf

  • DOI
    10.1109/APCCAS.2008.4746011
  • Filename
    4746011