The implementation of a PC-based list processor for symbolic computation

The authors present the design and the evaluation results of the arithmetical symbolical list processor (ASLP), a purpose-built processor for list handling and processing. Multiple buses and multiple memory principles are applied for pipelining and parallel data movements. This microprogrammable ASLP is a stand-alone processor which connects to an IBM/AT personal computer. The IBM/AT personal computer works as the host of software development. The prototype of the ASLP is constructed using standard chips. A special micro-assembler is written for the ASLP micro-assembly program translation. Most standard list functions are programmed and evaluated. In parallel with the evaluation, the core part of the original hardware design of the ASLP is being redesigned using ASICs