DocumentCode
2325562
Title
Design and implementation of FPGA based Local Cyclic Code encoder/decoder
Author
Nguyen, Hieu T. ; Nguyen, Minh N. ; Dang, Bac H. ; Custovic, Edhem
Author_Institution
Dept. of Electron. Eng., PTIT Univ., Hanoi, Vietnam
fYear
2011
fDate
21-24 Nov. 2011
Firstpage
151
Lastpage
156
Abstract
This paper presents a novel FPGA based method to implement the multiplication and squaring of polynomials circuits with an emphasis on their applications in Local Cyclic Code encoders and decoders. The LCC encoders and decoders are designed using VHDL and implemented on Xilinx XC3S500E-4CPG132 platform. The simulation results and hardware implementation results are also described within this paper.
Keywords
cyclic codes; field programmable gate arrays; FPGA based local cyclic code encoder/decoder; LCC decoders; LCC encoders; multiplication; polynomial circuits; squaring; Clocks; Decoding; Encoding; Field programmable gate arrays; Generators; Logic gates; Polynomials; CMG — Cyclic Multiplicative Group; FPGA; LCC — Local Cyclic Code; MG — Multiplicative Group;
fLanguage
English
Publisher
ieee
Conference_Titel
Broadband and Biomedical Communications (IB2Com), 2011 6th International Conference on
Conference_Location
Melbourne, VIC
Print_ISBN
978-1-4673-0768-0
Type
conf
DOI
10.1109/IB2Com.2011.6217910
Filename
6217910
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