Title :
A reconfigurable arbiter for SOC applications
Author :
Yuan, Ching-Chien ; Huang, Yu-Jung ; Lin, Shih-Jhe ; Huang, Kai-Hsiang
Author_Institution :
Dept. of Electron. Eng., I-Shou Univ., Kaohsiung
fDate :
Nov. 30 2008-Dec. 3 2008
Abstract :
For a SOC communication architecture, an efficient arbitration algorithm to resolve contention schemes for managing simultaneous access requests to the shared communication resources are required to prevent system performance degradation.This paper presents the design and performance analysis of an arbiter with a hybrid arbitration algorithm. The hybrid arbitration algorithm contains static fixed priority algorithm in conjunction with dynamic algorithm to gain better system performance is described. The performance analysis for the various combinations of the arbitration algorithms under different traffic loads is simulated. The results indicate a better performance can be achieved as compared with the traditional arbitration assignment scheme. Based on the performance analysis, the hybrid arbitration can be custom-tuned to meet the design requirements. The implementation of the arbiter with hybrid arbitration scheme for system on chip applications is also explained. The reconfigurable arbiter was implemented by FPGA and synthesized by Synopsys design complier with a TSMC 0.18 mum cell library.
Keywords :
asynchronous circuits; system-on-chip; SOC applications; access requests; contention schemes; hybrid arbitration algorithm; reconfigurable arbiter; shared communication resources; static fixed priority algorithm; Algorithm design and analysis; Analytical models; Content management; Degradation; Heuristic algorithms; Performance analysis; Performance gain; Resource management; System performance; Telecommunication traffic;
Conference_Titel :
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location :
Macao
Print_ISBN :
978-1-4244-2341-5
Electronic_ISBN :
978-1-4244-2342-2
DOI :
10.1109/APCCAS.2008.4746123