High-speed and low-energy Ternary content addressable memory using two-step comparison and feedback sense amplifier

This paper presents a match-line architecture to reduce the energy consumption of Ternary content-addressable memory (TCAM) and to increase search speed. The proposed match-line (ML) sensing scheme uses a two-step comparison to filter out most of the mismatched MLs in the first step so that the second step comparison is never activated for those mismatched MLs. Simulation using 130-nm 1.2-V CMOS logic shows more than 50% ML energy reduction potential for mismatched MLs compared to conventional current-race (CR) sensing scheme. Also, feedback in the first stage ML charging and lower resistance in the second stage charging path result in ~25% speed enhancement compared to the CR scheme. Finally, implementation complexity has been kept low by avoiding additional control signals as opposed to many sensing schemes found in the literature.