Development of an FPGA based low power message displaying system using scanning technique

Power efficient solution is essential for the portable electronic system. This paper presents an FPFA based embedded system for low power message display. Scanning technique is used to minimize the power. Experiment is conducted on 30 seven segments where an FPGA based intelligent controller scans all the display elements continuously at a certain speed to ensure only one display unit is on and other are off at a given time but human eye cannot detect it. Test result shows the significant reduction of power consumption over static display system.