DocumentCode :
2326432
Title :
Hardware efficient frequency estimator based on data-aided algorithm for digital video broadcasting system
Author :
Ryu, Chang D. ; Park, Jang W. ; Sunwoo, Myung Hoon ; Kim, Pan Soo ; Chang, Dae-Ig
Author_Institution :
Sch. of Electr. & Comput. Eng., Ajou Univ., Suwon
fYear :
2008
fDate :
Nov. 30 2008-Dec. 3 2008
Firstpage :
890
Lastpage :
893
Abstract :
This paper presents an efficient frequency estimator for digital video broadcasting - second generation (DVB-S2). Analyzing the robust algorithm among data-aided approaches, we find that the Luise & Reggiannini (L&R) algorithm is the most suitable one for coarse frequency estimation with respect to estimation performance and complexity. However, it requires many multipliers and adders to compute output values of correlators. We propose an efficient architecture identifying the serial correlator with the buffer and multiplexers. The proposed coarse frequency estimator can reduce the hardware complexity about 92% of the direct implementation. The proposed architecture has been implemented and verified on the Xilinx Virtex II FPGA.
Keywords :
correlation methods; digital video broadcasting; field programmable gate arrays; frequency estimation; DVB-S2; FPGA; Xilinx Virtex II; data-aided algorithm; digital video broadcasting system; hardware efficient frequency estimator; serial correlator; Adders; Algorithm design and analysis; Computer architecture; Correlators; Digital video broadcasting; Frequency estimation; Hardware; Multiplexing; Performance analysis; Robustness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location :
Macao
Print_ISBN :
978-1-4244-2341-5
Electronic_ISBN :
978-1-4244-2342-2
Type :
conf
DOI :
10.1109/APCCAS.2008.4746166
Filename :
4746166
Link To Document :
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