• DocumentCode
    2327239
  • Title

    Fast architectures for pattern recognition and classifier training

  • Author

    Aravena, J.L.

  • Author_Institution
    Louisiana State Univ., Baton Rouge, LA
  • fYear
    1990
  • fDate
    11-13 Mar 1990
  • Firstpage
    17
  • Lastpage
    21
  • Abstract
    A systolic architecture is presented for the classification of patterns using the maximum likelihood algorithm. A unique feature of the architecture is the capability of online training. By use of recursive expressions, the classification functions can be updated taking into account all the previous parameters. The proposed architecture is capable of classifying an N-dimensional pattern in (N+1)/2 cycles. It features full use of symmetry properties to speed up computations and to reduce storage requirements
  • Keywords
    computerised pattern recognition; digital signal processing chips; learning systems; online operation; parallel architectures; systolic arrays; classification; classifier training; maximum likelihood algorithm; online training; pattern recognition; systolic architecture; systolic arrays; vector processing; Application software; Computer architecture; Computer vision; Covariance matrix; Image analysis; Image processing; Machine vision; Pattern analysis; Pattern recognition; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System Theory, 1990., Twenty-Second Southeastern Symposium on
  • Conference_Location
    Cookeville, TN
  • ISSN
    0094-2898
  • Print_ISBN
    0-8186-2038-2
  • Type

    conf

  • DOI
    10.1109/SSST.1990.138106
  • Filename
    138106