An FPGA implementation of 1,024-neuron system for PAPR reduction of OFDM signal

The aim of this paper is to reduce computational complexity of the neural network for PAPR reduction of OFDM signal, and to implement the neural network including 1,024 neurons by FPGA for practical OFDM transmitter of the terrestrial digital broadcast. A couple of IDFTs reduce computational complexity of the neuron updating from O(N²) to O(N log N). This neural network is designed using VHDL for Xilinx FPGA device, XC2V6000, and 1,024-neuron system is implemented by less than 30% of resources of the device.