Title :
A simple MOSFET model of an artificial synapse
Author_Institution :
Fac. of Electron. Eng. & Technol., Sofia Tech. Univ., Bulgaria
Abstract :
A simple analog-signal synapse model is developed and later implemented on a standard 0.35 μm CMOS process to provide for large scale of integration, high processing speed and manufacturability of a multi-layer artificial neural network. Synapse nonlinearity with respect to synapse weight is studied. Demonstrated is the capability of the circuit to operate in both feed-forward and learning (training) mode. The effect of the synapse´s inherent quadratic nonlinearity on learning convergence and on the optimization of weight vector update direction is analyzed and found to be beneficial. The suitability of the proposed implementation for very large-scale artificial neural networks is confirmed.
Keywords :
MOSFET; feedforward; learning (artificial intelligence); neural nets; optimisation; CMOS process; artificial synapse; feedforward; learning convergence; learning mode; multilayer artificial neural network; quadratic nonlinearity; simple MOSFET model; simple analog-signal synapse model; synapse nonlinearity; weight vector update direction optimization; Artificial neural networks; CMOS process; Convergence; Feedforward systems; Large scale integration; MOSFET circuits; Manufacturing processes; Semiconductor device modeling; Standards development; Virtual manufacturing;
Conference_Titel :
Neural Networks, 2004. Proceedings. 2004 IEEE International Joint Conference on
Print_ISBN :
0-7803-8359-1
DOI :
10.1109/IJCNN.2004.1381066
