DocumentCode :
2327910
Title :
Automating the design of asynchronous sequential logic circuits
Author :
Wu, Sheng-Fu ; Fisher, P.
Author_Institution :
Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA
fYear :
1990
fDate :
13-16 May 1990
Abstract :
The proposed CAD process simplifies the task of designing asynchronous sequential logic circuits (ASLCs). It provides a highly structured, interactive approach for modeling ASLCs and for mapping these models into architectures and gate-level circuits. This task-oriented system provides a convenient way to describe the design specification. It can also be used to facilitate the investigation of alternative ASLC architectures for purposes of optimizing a given design
Keywords :
asynchronous sequential logic; logic CAD; alternative ASLC architectures; architectures; design of asynchronous sequential logic circuits; design optimisation; design specification; gate-level circuits; modeling ASLCs; structured interactive method; task-oriented system; Clocks; Connectors; Corporate acquisitions; Design automation; Design optimization; Equations; Hazards; Matrix converters; Process design; Sequential circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990
Conference_Location :
Boston, MA
Type :
conf
DOI :
10.1109/CICC.1990.124830
Filename :
124830
Link To Document :
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