A CMOS low-dropout regulator with 3.3 μA quiescent current independent of off-chip capacitor

Author

Wang, Yi ; Cui, Chuanrong ; Gong, Wenchao ; Ning, Zhihua ; HE, Lenian

Author_Institution

Inst. of VLSI Design, Zhejiang Univ., Hangzhou

fYear

2008

fDate

Nov. 30 2008-Dec. 3 2008

Firstpage

1320

Lastpage

1323

Abstract

A CMOS low-dropout regulator (LDO) with 3.3 V output voltage and 100 mA output current for system-on-chip applications is presented. The proposed LDO is independent of off-chip capacitor, thus the board space and external pins are reduced. By utilizing dynamic slew-rate enhancement (SRE) circuit and nested Miller compensation (NMC) on LDO structure, the proposed LDO provides high stability during line and load regulation without off-chip load capacitor. The overshot voltage has been limited within 550 mV and settling time is less than 50 mus when load current reducing from 100 mA to 1 mA. By using 30 nA reference current, the quiescent current is 3.3 muA. The experiment results agree with the simulation results. The proposed design is implemented by CSMC 0.5 mum mixed-signal process.

Keywords

CMOS integrated circuits; capacitors; system-on-chip; CMOS low-dropout regulator; dynamic slew-rate enhancement circuit; mixed-signal process; nested Miller compensation; off-chip capacitor; quiescent current; system-on-chip; Capacitors; Circuit stability; Circuit topology; Differential amplifiers; Helium; Pins; Regulators; System-on-a-chip; Very large scale integration; Voltage; 3.3μA; LDO; NMC; Off-chip Capacitor; SRE;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on

Conference_Location

Macao

Print_ISBN

978-1-4244-2341-5

Electronic_ISBN

978-1-4244-2342-2

Type

conf

DOI

10.1109/APCCAS.2008.4746271

Filename

4746271