Behavioral modeling for operational amplifier in sigma-delta modulators with Verilog-A

This paper presents the behavioral models for operational amplifier (opamp) by using analog hardware description language, Verilog-A. The Opamppsilas behavioral model is built with limited unit-gain bandwidth, slew-rate and nonlinear gain. A hyperbolic tangent model has been used to describe the nonlinearity of the Opamppsilas gain, which provides the error less than 0.26% against the transistor-level implementation. During the simulation of sigma-delta modulator, the switch-capacitor circuits and comparator are implemented in transistor level, simulations are performed at the transistor and behavioral mixed level, thus the error caused by time sequence has been introduced into the simulation results. The comparative results show that the Verilog-A model for Opamp incurs an error of no more than 0.3 dB in the magnitude of harmonics while providing a 15times advantage in the simulation speed with respect to transistor-level implementations.