DocumentCode :
2330203
Title :
A single-chip CMOS UHF RFID Reader transceiver for mobile applications
Author :
Le Ye ; Liao, Huailin ; Song, Fei ; Chen, Jiang ; Shi, Congyin ; Li, Chen ; Liu, Junhua ; Huang, Ru ; Zhao, Jinshu ; Xiao, Huiling ; Liu, Ruiqiang ; Wang, Xinan
Author_Institution :
Inst. of Microelectron., Peking Univ., Beijing, China
fYear :
2009
fDate :
14-18 Sept. 2009
Firstpage :
228
Lastpage :
231
Abstract :
A UHF RFID Reader Transceiver for China standard (840~925 MHz) as well as meeting the protocols of EPC Class-1 Gen-2 and ISO/IEC 18000-6C is presented. To suppress the large self-jammer from transmitter to receiver, an on-chip self-jammer cancellation (SC) circuits and a fully-integrated DC-offset Cancellation (DCOC) circuits with quickly time-varying cut-off frequency are proposed to kill the self-jammer within 15 mus. Furthermore, a mixer with capacitor cross-coupled (CCC) common-gate input stage and vertical NPN BJT switching stage is proposed to achieve high linearity (-8 dBm P1 dB), good wideband matching and low 1/f noise corner. The transmitter integrated with a CMOS class-AB PA of 22 dBm output power in linear mode with 35% PAE, which is suitable for mobile applications, supports the DSB/SSB/PR-ASK modulation schemes and achieves ACPR1 of -45 dBc and ACPR2 of -60 dBc, which satisfies the stringent spectral mask of China local requirements. A sigma-delta PLL with a single LC VCO is also implemented for 250 kHz channel hopping and good phase noise (-126 dBc/Hz at 1MHz offset). The receiver has a sensitivity of down to -77 dBm in the presence of 20 dBm PA output power. The single-chip is implemented in standard 0.18 mum CMOS process. It occupies 13.5 mm2 silicon areas, and consumes 113 mA (without PA) from 1.8 V supply voltage.
Keywords :
CMOS integrated circuits; UHF integrated circuits; mobile radio; radiofrequency identification; transceivers; 1/f noise; CMOS; China standard; Class-1 Gen-2; DC-offset cancellation circuits; DSB/SSB/PR-ASK modulation; ISO/IEC 18000-6C; LC VCO; UHF RFID reader transceiver; capacitor cross-coupled common-gate input stage; class-AB power amplifier; current 113 mA; frequency 250 kHz; frequency 840 MHz to 925 MHz; mixer; on-chip self-jammer cancellation circuits; sigma-delta PLL; size 0.18 mum; time 15 mus; vertical NPN BJT switching stage; voltage 1.8 V; Capacitors; Circuits; Cutoff frequency; IEC standards; ISO standards; Power generation; Protocols; Radiofrequency identification; Transceivers; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ESSCIRC, 2009. ESSCIRC '09. Proceedings of
Conference_Location :
Athens
ISSN :
1930-8833
Print_ISBN :
978-1-4244-4354-3
Type :
conf
DOI :
10.1109/ESSCIRC.2009.5326003
Filename :
5326003
Link To Document :
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