DocumentCode
2330206
Title
An Improved Successive-approximation Register Design For Use In Monolithic A/D Converters
Author
Russell, Howard T., Jr.
fYear
1977
fDate
7-9 Nov 1977
Firstpage
45
Lastpage
49
Keywords
Algorithm design and analysis; Analog-digital conversion; Clocks; Data acquisition; Data conversion; Design engineering; Flip-flops; Phase change materials; Propagation delay; Signal design;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits, Systems and Computers, 1977. Conference Record. 1977 11th Asilomar Conference on
ISSN
1058-6393
Type
conf
DOI
10.1109/ACSSC.1977.729476
Filename
729476
Link To Document