Title :
A 60GHz power amplifier with 14.5dBm saturation power and 25% peak PAE in CMOS 65nm SOI
Author :
Siligaris, Alexandre ; Hamada, Yasuhiro ; Mounet, Christopher ; Raynaud, Christine ; Martineau, Baudouin ; Deparis, Nicolas ; Rolland, Nathalie ; Fukaishi, Muneo ; Vincent, Pierre
Author_Institution :
LETI, CEA, Grenoble, France
Abstract :
A 60 GHz wideband power amplifier (PA) is fabricated in standard CMOS SOI 65 nm process. The PA is constituted by two cascode stages. Input, output and inter-stage matching use coplanar wave guide (CPW) transmission lines that have low losses thanks to the high resistivity SOI substrate. The PA measurements are carried out for supply voltages VDD going from 1.2 V to 2.6 V and achieve a saturation power of 10 dBm to 16.5 dBm respectively. The peak power added efficiency is higher than 20% for all applied VDD values.
Keywords :
CMOS integrated circuits; MIMIC; coplanar transmission lines; coplanar waveguides; losses; millimetre wave power amplifiers; silicon-on-insulator; wideband amplifiers; CMOS SOI process; Si-SiO2; cascode stages; coplanar wave guide transmission lines; frequency 60 GHz; inter-stage matching; size 65 nm; voltage 1.2 V to 2.6 V; wideband power amplifier; Broadband amplifiers; CMOS process; Conductivity; Coplanar transmission lines; Coplanar waveguides; Impedance matching; Power amplifiers; Power measurement; Power transmission lines; Propagation losses;
Conference_Titel :
ESSCIRC, 2009. ESSCIRC '09. Proceedings of
Conference_Location :
Athens
Print_ISBN :
978-1-4244-4354-3
DOI :
10.1109/ESSCIRC.2009.5326013
