NXG07-4: On Minimizing Feedback Overhead for Two-stage Switches

A novel feedback-based two-stage switch architecture is presented in for solving the packet mis-sequencing problem in designing two-stage switches. With this architecture, each middle- stage port j piggybacks an N-bit VOQ occupancy vector to an output port k in each time slot. As output k and input k reside on the same line-card, input k schedules a packet for sending in the next time slot based on the N-bit feedback. In this paper, we focus on designing efficient packet scheduling algorithms for cutting down the number of feedback bits required while minimizing the negative impact to switch performance. The basic idea is to partition N VOQs at a middle-stage port into M non-overlapped sets. In each time slot, only the queue occupancies of selected sets are sent. By exploiting the otherwise wasted bandwidth in the first-stage switch, each input port is also allowed to piggyback its VOQ status to middle-stage ports. This allows each middle-stage port to intelligently select the sets of VOQs for feedback. Extensive simulation results show that among our proposed scheduling algorithms, the set-feedback scheduler provides the best performance under various traffic conditions.