DocumentCode :
2330853
Title :
Construction of short-length LDPC codes with low error floor
Author :
Zheng, X. ; Lau, F.C.M. ; Tse, C.K. ; He, Y.
Author_Institution :
Dept. of Electron. & Inf. Eng., Hong Kong Polytech. Univ., Hong Kong
fYear :
2008
fDate :
Nov. 30 2008-Dec. 3 2008
Firstpage :
1818
Lastpage :
1821
Abstract :
It has been known that stopping sets and trapping sets are the main contributors to error floors exhibited by short-length low-density parity-check (LDPC) codes. In this work, a new metric called ldquoapproximate cycle set extrinsic message degree (ACSE)rdquo is defined to help removing stopping sets with small size and bad trapping sets. Based on the new metric, we propose a code-construction algorithm that produces LDPC codes with very low error floors. Finally, we compare the error rates between codes produced by the proposed algorithm and MacKay code.
Keywords :
error statistics; parity check codes; set theory; MacKay code; approximate cycle set extrinsic message degree; low error floor; short-length LDPC codes; short-length low-density parity-check; stopping sets; trapping sets; Bipartite graph; Educational institutions; Electron traps; Error analysis; Error correction codes; Floors; Iterative decoding; Joining processes; Parity check codes; Signal to noise ratio;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location :
Macao
Print_ISBN :
978-1-4244-2341-5
Electronic_ISBN :
978-1-4244-2342-2
Type :
conf
DOI :
10.1109/APCCAS.2008.4746396
Filename :
4746396
Link To Document :
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