FPGA implementation of CDMA trans-receiver

Code division multiple access (CDMA) systems are being counted to provide the necessary infrastructure to implement future 3G systems. The CDMA is uniquely featured by its spread spectrum (a random) process employing a pseudo random noise (PN) sequence, thus it is called the spread spectrum multiple access (SSMA). The CDMA can eliminate the data transfer latency variations by sharing the data communication media among multiple users concurrently. In this proposed work, we simulate the functionality of CDMA system on Xilinx ISE platform. Here, we use Manchester encode/decode technique for encryption and decryption. The simulation results show the working of CDMA transmitter and receiver on Verilog platform. Implementation of proposed system is targeted on Virtex 5 FPGA.