DocumentCode
2331412
Title
Fully integrated linear single photon avalanche diode (SPAD) array with parallel readout circuit in a standard 180 nm CMOS process
Author
Isaak, Suhaila ; Bull, Stephen ; Pitter, Mark Charles ; Harrison, Ian
Author_Institution
Dept. of Electr. & Electron. Eng., Univesrity of Nottingham, Nottingham, UK
fYear
2010
fDate
1-3 Dec. 2010
Firstpage
1
Lastpage
2
Abstract
This paper reports on the development of a SPAD device and its subsequent use in an actively quenched single photon counting imaging system. The device was fabricated in a UMC 0.18 μm CMOS process. The device has a cross-section of circular p+/n-well pn junction SPAD with 10 μm diameter active area. A low-doped p-guard ring (t-well layer) encircles the active area to prevent the premature reverse breakdown on a reverse biased diode breakdown.
Keywords
CMOS image sensors; avalanche photodiodes; detector circuits; photodetectors; photon counting; readout electronics; SPAD array; UMC CMOS process; actively quenched single photon counting imaging system; linear single photon avalanche diode; readout circuit; reverse biased diode breakdown; size 180 mum;
fLanguage
English
Publisher
ieee
Conference_Titel
Enabling Science and Nanotechnology (ESciNano), 2010 International Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4244-8853-7
Type
conf
DOI
10.1109/ESCINANO.2010.5700935
Filename
5700935
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