Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays

Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this paper, we suggest a way to reduce the decoder size and keep it defect tolerant by using multiple threshold voltages (V _T), which is enabled by our underlying technology. We define two types of multi-valued decoders and model the defects they undergo due to the V _T variation. Multi-valued hot decoders yield better area saving than n-ary reflexive codes (NRC), and under severe conditions, NRC enables a non-vanishing part of the code space to recover. There are many combinations of decoder type and number of V _T´s yielding equal effective memory capacities. The optimal choice saves area up to 24%. We also show that the precision of the addressing voltages for decoders with unreliable V _T´s is a crucial parameter for the decoder design and permits large savings in memory area.