Ground plane influence on enhanced dynamic threshold UTBB SOI nMOSFETs

This paper investigates the ground plane influence on Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT) operation (V_B=V_G) over the conventional one (V_B=0V). The ground plane in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (V_B=k×V_G) and the inverse eDT mode (V_G=k×V_B) were also considered and compared to the other configurations. The presence of the Ground Plane region in all DT configurations results in superior DC parameters like on-current/off-current ratio, a steeper subthreshold slope and a higher transconductance.