Modeling and analysis of interference between phase-locked loops

Author

Mizuno, Junki ; Yoshimura, Tsutomu ; Iwade, Syuhei ; Makino, Hiroshi ; Matsuda, Yoshio

Author_Institution

Grad. Sch. of Eng., Osaka Inst. of Technol., Osaka, Japan

fYear

2012

fDate

9-11 May 2012

Firstpage

1

Lastpage

2

Abstract

We study the influence of the interference between the integrated closed-loop circuits such as PLL circuits based on circuit simulation. Two different types of oscillators which are the ring and the LC-tank oscillators are applied to this analysis. We investigate the influence of the shared analog supply of two PLLs and the capacitive connection between the loop filter of the PLL and the digital circuit of the other PLL. In the circuit simulations, we see that the output of the VCO becomes unstable without any external noise due to these interconnections. From these results, we present the guideline for the design of the low phase noise against the interference between PLLs.

Keywords

circuit simulation; phase locked loops; phase noise; voltage-controlled oscillators; LC-tank oscillator; PLL circuit; VCO; capacitive connection; circuit simulation; digital circuit; integrated closed-loop circuit; interference; loop filter; low phase noise; phase-locked loops; ring oscillator; Interference; Jitter; Mathematical model; Noise; Phase locked loops; Sensitivity; Voltage-controlled oscillators; behavior model; phase noise; phase-locked loop; voltage-controlled oscillator;

fLanguage

English

Publisher

ieee

Conference_Titel

Future of Electron Devices, Kansai (IMFEDK), 2012 IEEE International Meeting for

Conference_Location

Osaka

Print_ISBN

978-1-4673-0837-3

Type

conf

DOI

10.1109/IMFEDK.2012.6218633

Filename

6218633