Analysis of harmonic distortion of asymmetric self-cascode association of SOI nMOSFETs operating in saturation

Author

d´Oliveira, Ligia Martins ; Trevisoli Doria, Rodrigo ; Pavanello, Marcelo Antonio ; de Souza, M. ; Flandre, Denis

Author_Institution

Electr. Eng. Dept., Centro Univ. da FEI, São Bernardo do Campo, Brazil

fYear

2014

fDate

2-4 April 2014

Firstpage

1

Lastpage

6

Abstract

This paper presents an experimental analysis of the harmonic distortion of asymmetric self-cascode (A-SC) association of SOI transistors. This goal is achieved by comparing the A-SC to the symmetric self-cascode (S-SC) configuration with different channel lengths. The non-linearity data have been obtained by applying the Integral Function Method to experimental measurements, for the evaluation of the total and third-order harmonic distortion. The results show that the asymmetric self-cascode provides lower total harmonic distortion than S-SC for all studied channel length associations. If a target distortion level is fixed, the A-SC enables an increase of input signal amplitude. On the other hand, smaller input signal amplitude and distortion are verified in the A-SC when fixing the output amplitude.

Keywords

MOSFET; harmonic distortion; silicon-on-insulator; A-SC association; S-SC configuration; SOI nMOSFETs; SOI transistors; asymmetric self-cascode association; channel length associations; input signal amplitude; integral function method; symmetric self-cascode configuration; total harmonic distortion analysis; Degradation; Gain; Harmonic distortion; Least squares approximations; Logic gates; MOSFET; Asymmetric Self-Cascode; Harmonic Distortion; SOI MOSFET;

fLanguage

English

Publisher

ieee

Conference_Titel

Devices, Circuits and Systems (ICCDCS), 2014 International Caribbean Conference on

Conference_Location

Playa del Carmen

Print_ISBN

978-1-4799-4684-6

Type

conf

DOI

10.1109/ICCDCS.2014.7016161

Filename

7016161