Device and circuit performance evaluation and improvement of SiGe Tunnel FETs

Author

Mishr, R. ; Ghosh, Bahniman ; Banerjee, Sanjay K.

Author_Institution

Dept. of EE, IIT Kanpur, Kanpur, India

fYear

2010

fDate

1-3 Dec. 2010

Firstpage

1

Lastpage

2

Abstract

Investigation on Tunnel FETs in recent years have proved them to be better than conventional MOSFETs lower subthreshold swing, lower power consumption and their scaling is not limited by quantum mechanical effects. Improvement in the on-current of TFETs has been proposed by the use of SiGe layer on the source side. This paper investigates the effect of different Ge mole fractions on the performance of various benchmark circuits (inverter, inverter with constant load, 8 bit ripple carry adder (RCA), 5 stage ring oscillator, 10 stage NAND and NOR chain). A method of the I_on/I_off ratio of TFETs with high Ge composition, by grading the Ge composition has also been suggested.

Keywords

Ge-Si alloys; MOSFET; electric current; multilayers; power consumption; Ge composition; Ge mole fraction effect; I_on/I_off ratio; SiGe; SiGe layer; SiGe tunnel FET improvement; TFET on-current; benchmark circuits; circuit performance evaluation; conventional MOSFET; device performance evaluation; power consumption; quantum mechanical effects; source side; subthreshold swing;

fLanguage

English

Publisher

ieee

Conference_Titel

Enabling Science and Nanotechnology (ESciNano), 2010 International Conference on

Conference_Location

Kuala Lumpur

Print_ISBN

978-1-4244-8853-7

Type

conf

DOI

10.1109/ESCINANO.2010.5701031

Filename

5701031