• DocumentCode
    233346
  • Title

    Proteus: An open source dynamically reconfigurable system-on-chip with applications to digital signal processing

  • Author

    Jacoby, Andres ; Llamocca, Daniel ; Jordan, Ramiro ; Vera, G. Alonzo

  • fYear
    2014
  • fDate
    2-4 April 2014
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Digital systems capable of altering their hardware configuration on the fly are labeled dynamically reconfigurable. Proteus is an OpenRISC-based computer optimized for Xilinx´s FPGAs that can dynamically reconfigure itself. Proteus was conceived as a platform to facilitate the study of reconfigurable computing architectures by providing a turn-key solution that is openly available. This paper describes Proteus´s architecture, its application to digital signal processing, its capabilities and ongoing research at several institutions.
  • Keywords
    digital signal processing chips; field programmable gate arrays; reduced instruction set computing; system-on-chip; OpenRISC-based computer; Proteus; Xilinx FPGA; digital signal processing; dynamically reconfigurable system-on-chip; hardware configuration; open source; turn key solution; Computer architecture; Computers; Digital signal processing; Discrete cosine transforms; Field programmable gate arrays; Hardware; Software;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Devices, Circuits and Systems (ICCDCS), 2014 International Caribbean Conference on
  • Conference_Location
    Playa del Carmen
  • Print_ISBN
    978-1-4799-4684-6
  • Type

    conf

  • DOI
    10.1109/ICCDCS.2014.7016176
  • Filename
    7016176